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  low-voltage cmos octal d-type flip-flop flow through pinout with 5vtolerant inputs and outputs (3state, noninverting) the mc74lcx574 is a high performance, noninverting octal dtype flipflop operating from a 2.3 to 3.6v supply. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5v allows mc74lcx574 inputs to be safely driven from 5v devices. the mc74lcx574 consists of 8 edgetriggered flipflops with individual dtype inputs and 3state true outputs. the buffered clock and buffered output enable (oe ) are common to all flipflops. the eight flipflops will store the state of individual d inputs that meet the setup and hold time requirements on the lowtohigh clock (cp) transition. with the oe low, the contents of the eight flipflops are available at the outputs. when the oe is high, the outputs go to the high impedance state. the oe input level does not affect the operation of the flipflops. the lcx574 flow through design facilitates easy pc board layout. ? designed for 2.3 to 3.6v v cc operation ? 5v tolerant e interface capability with 5v ttl logic ? supports live insertion and withdrawal ? i off specification guarantees high impedance when v cc = 0v ? lvttl compatible ? lvcmos compatible ? 24ma balanced output sink and source capability ? near zero static supply current in all three logic states (10 m a) substantially reduces system power requirements ? latchup performance exceeds 500ma ? esd performance: human body model >2000v; machine model >200v ? semiconductor components industries, llc, 2001 january, 2001 rev. 3 1 publication order number: mc74lcx574/d pin names function output enable input clock pulse input data inputs 3state outputs pins oe cp d0d7 o0o7 mc74lcx574 lowvoltage cmos octal dtype flipflop dw suffix plastic soic case 751d04 dt suffix plastic tssop case 948e02 20 1 20 1 m suffix plastic soic eiaj case 96701 20 1
mc74lcx574 http://onsemi.com 2 figure 1. pinout: 20lead (top view) 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o0 o1 o2 o3 o4 o5 o6 o7 cp oe d0 d1 d2 d3 d4 d5 d6 d7 gnd o0 d0 o1 d1 o2 d2 o3 d3 o4 d4 o5 d5 o6 d6 o7 d7 figure 2. logic diagram ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d ncp q d cp oe 11 1 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12
mc74lcx574 http://onsemi.com 3 inputs internal latches outputs oe cp dn q on operating mode l l l h l h l h load and read register l x nc nc hold and read register h x nc z hold and disable outputs h h l h l h z z load internal register and disable outputs h = high voltage level; h = high voltage level one setup time prior to the lowtohigh clock transition; l = low voltage level; l = low voltage level one setup time prior to the lowtohigh clock transition; nc = no change; x = high or low voltage level and transitions are acceptable; z = high impedance state; = lowtohigh t ransition; = not a lowtohigh transition; for i cc reasons do not float inputs
mc74lcx574 http://onsemi.com 4 absolute maximum ratings* symbol parameter value condition unit v cc dc supply voltage 0.5 to +7.0 v v i dc input voltage 0.5 v i +7.0 v v o dc output voltage 0.5 v o +7.0 output in 3state v 0.5 v o v cc + 0.5 note 1. v i ik dc input diode current 50 v i < gnd ma i ok dc output diode current 50 v o < gnd ma +50 v o > v cc ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range 65 to +150 c * absolute maximum continuous ratings are those values beyond which damage to the device may occur. exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. functional operation under absolutemaximumrated co nditions is not implied. 1. output in high or low state. i o absolute maximum rating must be observed. recommended operating conditions symbol parameter min typ max unit v cc supply voltage operating data retention only 2.0 1.5 3.3 3.3 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage (high or low state) (3state) 0 0 v cc 5.5 v i oh high level output current, v cc = 3.0v 3.6v 24 ma i ol low level output current, v cc = 3.0v 3.6v 24 ma i oh high level output current, v cc = 2.7v 3.0v 12 ma i ol low level output current, v cc = 2.7v 3.0v 12 ma t a operating freeair temperature 40 +85 c d t/ d v input transition rise or fall rate, v in from 0.8v to 2.0v, v cc = 3.0v 0 10 ns/v dc electrical characteristics t a = 40 c to +85 c symbol characteristic condition min max unit v ih high level input voltage (note 2.) 2.7v v cc 3.6v 2.0 v v il low level input voltage (note 2.) 2.7v v cc 3.6v 0.8 v v oh high level output voltage 2.7v v cc 3.6v; i oh = 100 m a v cc 0.2 v v cc = 2.7v; i oh = 12ma 2.2 v cc = 3.0v; i oh = 18ma 2.4 v cc = 3.0v; i oh = 24ma 2.2 v ol low level output voltage 2.7v v cc 3.6v; i ol = 100 m a 0.2 v v cc = 2.7v; i ol = 12ma 0.4 v cc = 3.0v; i ol = 16ma 0.4 v cc = 3.0v; i ol = 24ma 0.55 2. these values of v i are used to test dc electrical characteristics only.
mc74lcx574 http://onsemi.com 5 dc electrical characteristics (continued) t a = 40 c to +85 c symbol characteristic condition min max unit i i input leakage current 2.7v v cc 3.6v; 0v v i 5.5v 5.0 m a i oz 3state output current 2.7 v cc 3.6v; 0v v o 5.5v; v i = v ih or v il 5.0 m a i off poweroff leakage current v cc = 0v; v i or v o = 5.5v 10 m a i cc quiescent supply current 2.7 v cc 3.6v; v i = gnd or v cc 10 m a cc y 2.7 v cc 3.6v; 3.6 v i or v o 5.5v 10 m a d i cc increase in i cc per input 2.7 v cc 3.6v; v ih = v cc 0.6v 500 m a ac characteristics (t r = t f = 2.5ns; c l = 50pf; r l = 500 w ) limits t a = 40 c to +85 c v cc = 3.0v to 3.6v v cc = 2.7v symbol parameter waveform min max min max unit f max clock pulse frequency 1 150 mhz t plh t phl propagation delay cp to on 1 1.5 1.5 8.5 8.5 1.5 1.5 9.5 9.5 ns t pzh t pzl output enable time to high and low levels 2 1.5 1.5 8.5 8.5 1.5 1.5 9.5 9.5 ns t phz t plz output disable time from high and low levels 2 1.5 1.5 6.5 6.5 1.5 1.5 7.0 7.0 ns t s setup time, high or low dn to cp 1 2.5 2.5 ns t h hold time, high or low dn to cp 1 1.5 1.5 ns t w cp pulse width, high or low 3 3.3 3.3 ns t oshl t oslh outputtooutput skew (note 3.) 1.0 1.0 ns 3. skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same d evice. the specification applies to any outputs switching in the same direction, either hightolow (t oshl ) or lowtohigh (t oslh ); parameter guaranteed by design. dynamic switching characteristics t a = +25 c symbol characteristic condition min typ max unit v olp dynamic low peak voltage (note 4.) v cc = 3.3v, c l = 50pf, v ih = 3.3v, v il = 0v 0.8 v v olv dynamic low valley voltage (note 4.) v cc = 3.3v, c l = 50pf, v ih = 3.3v, v il = 0v 0.8 v 4. number of outputs defined as ano. measured with an1o outputs switching from hightolow or lowtohigh. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3v, v i = 0v or v cc 7 pf c out output capacitance v cc = 3.3v, v i = 0v or v cc 8 pf c pd power dissipation capacitance 10mhz, v cc = 3.3v, v i = 0v or v cc 25 pf
mc74lcx574 http://onsemi.com 6 waveform 3 - pulse width t r = t f = 2.5ns (or fast as required) from 10% to 90%; output requirements: v ol 0.8v, v oh 2.0v 2.7v 0v 2.7v 0v 1.5v 1.5v figure 3. ac waveforms t w 1.5v 1.5v t w waveform 2 - output enable and disable times t r = t f = 2.5ns, 10% to 90%; f = 1mhz; t w = 500ns 2.7v 0v 0v oe on t pzh 3.0v t phz t pzl t plz on 1.5v 1.5v 1.5v v cc v oh - 0.3v v ol + 0.3v gnd 1.5v cp cp waveform 1 - propagation delays, setup and hold times t r = t f = 2.5ns, 10% to 90%; f = 1mhz; t w = 500ns 2.7v 0v dn cp 1.5v on 2.7v 0v v oh v ol t plh , t phl t h t s 1.5v 1.5v f max open pulse generator r t dut v cc r l r 1 c l 6v gnd test switch t plh , t phl open t pzl , t plz 6v open collector/drain t plh and t phl 6v t pzh , t phz gnd c l = 50pf or equivalent (includes jig and probe capacitance) r l = r 1 = 500 w or equivalent r t = z out of pulse generator (typically 50 w ) figure 4. test circuit
mc74lcx574 http://onsemi.com 7 outline dimensions dw suffix plastic soic package case 751d04 issue e m suffix plastic soic eiaj package case 96701 issue o 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane  h x 45  e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90  0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.  dim min max min max inches --- 2.05 --- 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 12.35 12.80 0.486 0.504 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 --- 0.81 --- 0.032 a 1 h e q 1 l e  10  0  10  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). h e a 1 l e q 1  c a z d e 20 110 11 b m 0.13 (0.005) e 0.10 (0.004) view p detail p m l a b c d e e l m z
mc74lcx574 http://onsemi.com 8 outline dimensions dt suffix plastic tssop package case 948e02 issue a dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane -w-. 110 11 20 pin 1 ident a b t 0.100 (0.004) c d g h section nn k k1 jj1 n n m f w seating plane v u s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com tollfree from mexico: dial 018002882872 for access then dial 8662979322 asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc74lcx574/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (monfri 2:30pm to 7:00pm cet) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (monfri 2:00pm to 7:00pm cet) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (monfri 12:00pm to 5:00pm gmt) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, uk, ireland


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